1. Filed of the Invention
The present invention relates generally to a distortion compensating circuit for compensating distortion of a signal, and more particularly, to a distortion compensating circuit provided in a recording and reproducing apparatus for a video signal such as a video tape recorder (referred to as VTR hereinafter) for compensating nonlinear distortion caused in the video signal caused by characteristics of a modulator, a demodulator, an amplifier and the like included in the recording and reproducing apparatus.
2. Description of the Background Art
Conventionally, it is known that in a video signal recording and reproducing apparatus such as VTR, nonlinear distortion occurs in the video signal in recording and reproducing the video signal due to characteristics of an FM modulator, an FM demodulator, an amplifier and the like. Therefore, proposed is a distortion compensating circuit for compensating, by detecting distortion of a ramp signal previously included in a video signal to be recorded, nonlinear distortion of the reproduced video signal itself, which is disclosed for example, in Japanese Patent Laying-Open No. 63-10982 laid open on Jan. 18, 1988 and in "National Technical Report", pp. 425-427, volume 32, No. 4, issued August 1986.
FIG. 1 is a block diagram schematically explaining signal flow in a reproduction system of a VTR in which such a distortion compensating circuit is used. Four channel video signals reproduced from a magnetic tape 1 by four magnetic heads 2a through 2d are respectively amplified by the corresponding reproducing amplifiers 3a through 3d, and then the amplified reproduced video signals are applied to an equalizer and RF switching circuit 4 wherein the signals are converted into sequential signals of two channels. The two channel reproduced video signals are applied to an FM demodulator 5, wherein they are FM demodulated. The reproduced video signals FM demodulated by the FM demodulator 5 are applied to a time base corrector (TBC) 6, wherein they are converted into digital signals and time bases thereof are corrected. The reproduced video signals converted into the digital signals in the TBC 6 are applied to a distortion compensating circuit (or a digital level compensating circuit DLC) 7. As will be described in detail later, the distortion compensating circuit 7 compensates nonlinear distortion of the reproduced video signals. After the reproduced video signals which nonlinear distortion is compensated are applied to a TCI decoder 8 and subjected to a TCI processing, dropout of the reproduced signals is compensated by a dropout compensating circuit (DOC) 9 and at the same time, the signals are reconverted into analog signals and outputted as a luminance signal Y and two color signals P.sub.B and P.sub.R.
FIG. 2 is a schematic block diagram showing the structure of the distortion compensating circuit 7 shown in FIG. 1. In FIG. 2, the distortion compensating circuit 7 receives a digital reproduced video signal applied from the TBC 6 of FIG. 1. This reproduced video signal is applied to a gate circuit 10, wherein input ramp signals Ln included in respective blanking periods of the reproduced video signal are extracted, and then the extracted input ramp signals Ln are applied to an averaging circuit 11. The averaging circuit 11 averages input ramp signals of several fields in response to time base signals Tn supplied from a time base signal source (not shown) in order to reduce noise components included in the reproduced ramp signals and applies the result thereof as a data signal to an RAM 12. In addition, the time base signals Tn are applied to an address input of the RAM 12 and consequently, while being addressed by the time base signals Tn, the RAM 12 stores the averaged input ramp signals as data signals.
In addition, the data signal outputted from the RAM 12 is applied to an address input of an RAM 13 through a switch 15 switched to a terminal 15a during a blanking period of the reproduced video signal, while the time base signal Tn is applied to the data input of the RAM 13. As a result, while using the data signal of the RAM 13 as an address signal, the RAM 13 stores the time base signal Tn as a data signal during the blanking period of the reproduced video signal. Namely, the information for compensating nonlinear distortion based on the input ramp signals is stored in the RAM 13.
Meanwhile, the reproduced video signal from the TBC 6 is applied to the address input of the RAM 13 through the switch 15 switched to a terminal 15b during a non-blanking period of the reproduced video signal. As a result, while using the reproduced video signal as an address signal, the RAM 13 outputs the stored data. The data signals outputted from the RAM 13 are applied to an address input of an ROM 14 and while using the data signals as address signals, the ROM 14 outputs data signals indicative of levels corresponding to the respective addresses.
Namely, the RAM 12 stores the input ramp signals subjected to nonlinear distortion while using the time base signals Tn as address signals and the RAM 13 stores the time base signals Tn while using the data signals corresponding to the input ramp signals as an address signals in such a manner that the address and the data are inverted with respect to the RAM 12. Then, by outputting the data signal corresponding to the time base signal Tn from the RAM 13 while using the reproduced video signal subjected to the nonlinear distortion as the address signal, the data signal which nonlinear distortion is compensated can be obtained.
Meanwhile, the conventional distortion compensating circuit shown in FIG. 2 requires two RAMs 12 and 13 and one ROM 14. These RAMs and ROM require large storage capacities for storing data corresponding to the whole input ramp signal. More specifically, assuming that the input video signal to the distortion compensating circuit is a digital signal of n bits, at least a capacity of n.times.2.sup.n bits is required. Therefore, such a conventional distortion compensating circuit as shown in FIG. 2 is difficult to be made smaller and reducing the manufacturing cost thereof is very difficult. Particularly, such problems are acute for a distortion compensating circuit for processing video signals of multiple channels.